Spin Qubits Confined to a Silicon Nano-Ridge
ORAL
Abstract
Electrostatically defined quantum dots (QDs) in silicon are an attractive platform for quantum computation based on electron spin qubits. Si qubit devices have been demonstrated by the modification of industrial FinFETs [1]. We propose a scalable qubit device fabricated by industry-compatible processes such as damascene and spacer processes [2].
The device consists of a double array of QDs formed along a silicon nano-ridge. We implement TiN side-gates, a global back-gate and a dense metallic top-gate array for controlling the QDs potentials. In order to minimize potential fluctuations caused by interface roughness and charged defects at the Si/SiO2 interface, the nano-ridge is anisotropically etched and exhibits atomically flat {111} facets. We characterized its interface roughness and the defect density of the Si/SiO2 interface. The most relevant process modules are experimentally demonstrated including local oxidation of the silicon nano-ridge, side-gate formation and top-gate fabrication using a low-pitch self-aligned spacer process.
[1] B. Voisin et al., Nano Lett. 14, 2094 (2014).
[2] J. Klos et al., Appl. Sci. 9, 3823 (2019).
The device consists of a double array of QDs formed along a silicon nano-ridge. We implement TiN side-gates, a global back-gate and a dense metallic top-gate array for controlling the QDs potentials. In order to minimize potential fluctuations caused by interface roughness and charged defects at the Si/SiO2 interface, the nano-ridge is anisotropically etched and exhibits atomically flat {111} facets. We characterized its interface roughness and the defect density of the Si/SiO2 interface. The most relevant process modules are experimentally demonstrated including local oxidation of the silicon nano-ridge, side-gate formation and top-gate fabrication using a low-pitch self-aligned spacer process.
[1] B. Voisin et al., Nano Lett. 14, 2094 (2014).
[2] J. Klos et al., Appl. Sci. 9, 3823 (2019).
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Presenters
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Jan Klos
- RWTH - Aachen