First-principles study of direct electron tunneling through ultra-thin SiO$_{2}$ layers

As the size of metal-oxide-semiconductor devices is scaled down to the sub-10-nm regime, the thickness of SiO$_{2}$ insulating layers reaches the range of 1-2 nm. Then, gate leakage current is unavoidable due to direct tunneling of electrons. In this work, we study the electron tunneling current through thin gate oxide layers for various Si(100)/SiO$_{2}$ interface models, which have different oxide thicknesses and crystal phases. We use a combined approach of the local-density-functional approximation and the matrix Green's function method. We test oxide layers in the $\alpha $-quartz, tridymite, and amorphous structures, which are sandwiched between two Si(100) electrodes. We find that Si induced gap states result from a decay of the silicon valence (conduction) band wave functions into the oxide region. The gate leakage current between two p+ Si electrodes is exponentially reduced as the oxide thickness increases, with the almost same decay rate of -1 decade/0.2 nm, regardless of the structure of oxide layers. We also find that the gate leakage current is affected by introducing interface roughness and oxygen vacancies in the oxide.