Progress on a tunable coupler architecture for parametric gates between far-detuned fixed-frequency transmon qubits: Part 1
ORAL
Abstract
Two-qubit gate performance is a major challenge in high fidelity operation of superconducting quantum processors. Designing an architecture to optimize two-qubit gates is a delicate balance between achieving fast gate speeds while minimizing coupling to the environment and unwanted interactions. Parametric gates are a promising method for entanglement, allowing large on-off ratios between detuned qubits. In this work we discuss progress on an architecture that uses a generalized flux qubit to couple two far-detuned fixed-frequency transmon qubits. AC flux modulation of the coupler allows for fast parametric gates while a DC flux bias allows the device to be tuned to a regime with zero static-ZZ crosstalk between the data qubits. Part 1: Circuit design and fabrication
*This work was supported by Army Research Office Grant No. W911NF1910016 and by EPiQC, an NSF Expedition in Computing, under grant CCF-1730449.
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Presenters
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Sara F Sussman
- Princeton