Two-qubit gate demonstration on superconducting overlap qubits compatible with cryo-CMOS multiplexer control

Scaling-up superconducting quantum processors is hindered by insufficient yield and uniformity of superconducting qubit parameters. Device variability is dominated by the Josephson junction, in particular by surface and line-edge roughness of junction electrodes as well as barrier thickness variation. These fabrication limitations can be overcome by foundry-standard fabrication processes, which are responsible for the success of the microelectronics industry. A fully foundry-compatible qubit fabrication process based on the overlap technique has already been used to demonstrate high-coherence fixed-frequency transmon qubits¹. In this talk we will present a two-qubit device with flux-tunable coupler fabricated with the overlap technique. Using a CPHASE gate we benchmark the performance of the overlap multiqubit device and discuss scaling perspectives including the compatibility with cryo-CMOS multiplexers.

¹Verjauw et al., npj Quantum Information 8, 93 (2022).