Characterization of ultra-low charge noise Silicon MOS quantum dots fabricated in a full 300mm CMOS platform

Silicon spin qubits are among the most promising candidates for large scale quantum computers, due to their excellent coherence and compatibility with CMOS technology for upscaling [1-4]. Advanced industrial CMOS processes are engineered to allow wafer-scale uniformity and high device yield. However, these processes cannot be directly carried over to spin qubits due to different designs and operating conditions.

By leveraging these processes, we have developed an optimized MOS gate stack specifically for spin qubit applications. We have characterized the MOS gate stack with gated hall-bars and used the optimized flow to fabricate quantum dot devices. We report highly uniform quantum dot operation and ultra-low noise at the SiSiO₂ interface at milli-Kelvin temperatures. These results confirm the excellent control over interface quality and set the basis for the large integration of quantum dot devices with low variability across the silicon wafer.



[1] X. Xue et al. Nature (2022)

[2] A. Noiri et al. Nature (2022)

[3] A. M. J. Zwerver et al. Nature Electronics (2022)

[4] R. Li et al. IEDM (2020)