Evaluating Surface Code Schemes for Neutral Atom Devices

With quantum computers beginning to scale to hundreds of qubits and beyond, error correction is a necessary step to reach the error rates required for large-scale applications. Understanding the performance of various error correcting codes on different hardware technologies will be needed to fully characterize these technologies and their potential. We evaluate surface code operations in the context of a neutral atom architecture using recently realized dual atom species arrays. We propose a novel embedding of surface code qubits into small clusters to exploit unique neutral atom properties such as long-distance interactions and flexible atom positioning which enables transversal CNOT gates. We perform numerical simulations to estimate logical error rates of our design and compare with corresponding lattice surgey operations. To better characterize the performance of the surface code on neutral atom devices, our analysis includes errors stemming from atom loss, reloading, and movement, in addition to typical qubit initialization, gate, and readout errors.