Integrating Si/SiGe quantum devices with on-chip classical circuitry
ORAL
Abstract
The rapid acceleration of quantum computing technologies is poised to reach an interconnect bottleneck, where the qubit count in a quantum processor is limited by the number of input-output (I/O) connections. We demonstrate the operation of an on-chip classical multiplexer on an array of Si/SiGe quantum Hall devices that reduces the I/O connections on the chip by nearly ten fold, with a Rent exponent p = 0. We use the Hall devices to characterize the performance of the integrated switches at 2K and high magnetic fields. We measure the signal bandwidth through the multiplexing circuit and discuss a protocol for multiplexed charge-sensing readout of quantum-dot qubits equipped with this technology. We discuss the impact of the finite bandwidth on single-shot readout fidelity for an array of N quantum dot charge sensors.
*Research was sponsored in part by the Army Research Office (ARO) under Grant Number W911NF-17-1-0274. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the Army Research Office (ARO), or the U.S. Government. The U.S. Government is authorized to reproduce and distribute reprints for Government purposes notwithstanding any copyright notation herein. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology and Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy's National Nuclear Security Administration under contract DE-NA0003525. SAND2022-14074 A
