Temperature scaling of spin qubit performance in Si/SiGe quantum dots
ORAL
Abstract
Gate-based accumulation devices for quantum information processing are usually operated in the 20mK regime, where charge noise is minimized and phonon processes are almost negligible. In recent years, operation at higher temperatures has gained interest in the community since operating at >1.6K unlocks simpler and more powerful cooling systems, ideal for co-integration with the necessary control electronics. We present the performance of our standard 28Si/SiGe devices [1] as the temperature is increased, a platform yet to be shown at higher temperatures. We report the effects of temperature on single-qubit timescales (T1, T2*, T2H, T2CPMG) and during PSB readout. Additionally, we measure noise at the sensors and qubits. We inspect the temperature response in the 200mK – 850mK regime, limited by readout visibility. Results across the qubit array show: (i) T1 scaling better behaved than [2] predicts, (ii) T2* almost flat, with temperature increase and (iii) whitening of the noise spectrum at high frequencies. All in all the device shows remarkable prospects for temperature scaling, especially considering that the heterostructure is not optimized for these temperatures.
[1] Universal control of a six-qubit quantum processor in silicon – Nature, 2022 – S.G.J. Philips, M.T. Madzik et al.
[2] Spin Lifetime and Charge Noise in Hot Silicon Quantum Dot Qubits – PRL, 2018 – L. Petit et al.
[1] Universal control of a six-qubit quantum processor in silicon – Nature, 2022 – S.G.J. Philips, M.T. Madzik et al.
[2] Spin Lifetime and Charge Noise in Hot Silicon Quantum Dot Qubits – PRL, 2018 – L. Petit et al.
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Presenters
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Oriol Pietx-Casas
- QuTech and the Kavli Institute of Nanoscience, Delft University of Technology
- QuTech