Semiconducting qubits with embedded control and readout cryo-CMOS circuits
ORAL
Abstract
The scaling of quantum nanoprocessors requires the development of integrated electronics as close as possible of the quantum chips. In this context, electron spin qubits in semiconductors have been identified as a promising platform due to both its long coherence time and the possibility to leverage the well-established fabrication of microelectronic foundries for Si based quantum devices. Their direct compatibility with CMOS electronics would enable a co-integration in a compact manner of quantum devices and control electronics. Studying the compatibility between these two fields is necessary to increase the size of quantum computing arrays beyond a few qubits and solve the connectivity bottleneck.
We present a spin qubit control and measurement platform composed of two cryo-CMOS control and readout circuits, co-integrated with a state-of-the-art Si-MOS quantum chip via 3D-stacking techniques. We first study the performances of each cryo-CMOS circuits at cryogenic temperatures, before connecting them to the quantum chip and probing their effect on the qubits (power dissipation, noise, stability). This pioneer work gives insight on the feasibility of large-scale spin qubit architectures.
We present a spin qubit control and measurement platform composed of two cryo-CMOS control and readout circuits, co-integrated with a state-of-the-art Si-MOS quantum chip via 3D-stacking techniques. We first study the performances of each cryo-CMOS circuits at cryogenic temperatures, before connecting them to the quantum chip and probing their effect on the qubits (power dissipation, noise, stability). This pioneer work gives insight on the feasibility of large-scale spin qubit architectures.
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Presenters
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Baptiste Jadot
- Univ. Grenoble Alpes, CEA, Leti, Grenoble, France