Measurements of superconducting qubits containing through-silicon vias

Superconducting qubits have developed from proof-of principle single-bit demonstrations to mature deployments of many-qubit quantum processors. With increased processor size comes the need for vertical input/output capabilities, which previously motivated the development of high-density superconducting thru-silicon vias (TSVs) for connecting grounds and route signals from opposite sides of substrate chips1. The potential utility of a TSV goes far beyond signal routing, in particular, a high-aspect-ratio TSV has a large capacitance that makes it a powerful tool for miniaturizing the largest-footprint components of superconducting quantum processors including the readout resonators and even qubits themselves. In this work we demonstrate compact TSV-enabled lumped-element resonators that provides vertical readout integration at a pitch smaller than that of a standard transmon qubit. We additionally demonstrate high-coherence transmon qubits for which TSVs provide the shunting capacitance, shrinking the on-chip footprint of the qubit by a factor of 10. We provide a bound on the loss in the TSV capacitor and discuss its possible future use in different superconducting qubits.

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