Assessing phonon trap efficiency through on-chip spatial and energy resolved detection of high energy impacts

High energy ionizing impacts (muons, gamma rays, etc.) on a chip convert to high energy phonons which can propagate over large distances in the substrate, breaking Cooper pairs in superconducting devices on their way. These impacts are detrimental for quantum computing as they can produce correlated errors, a critical pitfall for current quantum error correction schemes. Mitigating these impacts can be done e.g. through shielding or on-chip phonon traps. Being able to detect high energy impacts and quantify the efficiency of phonon traps is therefore of paramount importance for superconducting quantum processors.

In this talk I will present on-chip high energy events detection with both spatial and energy resolution in order to assess the efficiency of phonon traps. We fabricated on the same chip six resonators made of granular aluminum, a high kinetic inductance superconductor which maximizes the device’s susceptibility to Cooper pair breaking. Additionally, our chips were designed to host phonon traps made of aluminum, a lower gap superconductor, similarly to Ref. [1]. Using custom made electronics, we performed simultaneous event detection with time resolution at the nanosecond scale, allowing us to reconstruct the location of the impacts. Additionally, the time response of the resonators provides information about the impact's energy. In light of these results, I will discuss the efficiency of phonon traps in reducing the rate of (correlated) quasiparticle generation from ionizing impacts.

[1] Henriques, Valenti, et.al. Appl. Phys. Lett. 115, 212601 (2019)