Reliable Fabrication of Multi-Spin Qubit Devices in <sup>28</sup>Si/SiGe Heterostructures
ORAL
Abstract
Well-controlled and reliably operated multi-quantum-dot devices are key component of future spin-based quantum computers. We report state-of-the-art fabrication methods of multi-quantum dot linear arrays that are defined in isotopically purified in-house grown 28Si/SiGe heterostructures for spin qubit applications.
Our fabrication flow for the spin qubit devices is split into two parts: the first part is heterostructure growth and optical patterning of ohmics on 4-inch wafers, and the second part involves completion of the device nanofabrication including fine gates on 20x20 mm coupons. We employ a systematic approach of design, fabrication and characterization to provide feedback on the material and device quality at different stages of the fabrication process. For this, we implement on-chip multilayered test structure devices of various types in order to routinely extract different device and material parameters with a standard protocol. Such a split-step approach allows us to develop a high yield process, as well as rapidly experiment with gate designs, materials and individual process steps.
The highlights of devices made with this process include a two-qubit quantum processor yielding T2* of up to 20 µs and 99.6% two-qubit gate fidelity [1], the first online two spin qubit processor [2], and a universally controlled six spin qubit quantum processor [3].
[1] Xue et al., Nature 601, 343 (2022).
[2] https://www.quantum-inspire.com/
[3] Philips et al., Nature 609, 919 (2022).
Our fabrication flow for the spin qubit devices is split into two parts: the first part is heterostructure growth and optical patterning of ohmics on 4-inch wafers, and the second part involves completion of the device nanofabrication including fine gates on 20x20 mm coupons. We employ a systematic approach of design, fabrication and characterization to provide feedback on the material and device quality at different stages of the fabrication process. For this, we implement on-chip multilayered test structure devices of various types in order to routinely extract different device and material parameters with a standard protocol. Such a split-step approach allows us to develop a high yield process, as well as rapidly experiment with gate designs, materials and individual process steps.
The highlights of devices made with this process include a two-qubit quantum processor yielding T2* of up to 20 µs and 99.6% two-qubit gate fidelity [1], the first online two spin qubit processor [2], and a universally controlled six spin qubit quantum processor [3].
[1] Xue et al., Nature 601, 343 (2022).
[2] https://www.quantum-inspire.com/
[3] Philips et al., Nature 609, 919 (2022).
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Publication: 1.Philips, S. G. J. et al. Universal control of a six-qubit quantum processor in silicon. Nature 609, 919–924 (2022).
2.Wuetz, B. P. et al. Reducing charge noise in quantum dots by using thin silicon quantum wells. at http://arxiv.org/abs/2209.07242 (2022).
Presenters
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Larysa Tryputen
- TNO, Qutech
- Netherlands Organisation for Applied Scientific Research (TNO)
- QuTech and Netherlands Organization for Applied Scientific Research (TNO), Delft, The Netherlands
- TNO
- TNO/QuTech
- TNO Netherlands Organization for Applied Scientific Research