Physically and Algorithmically Secure Logic Locking with Hybrid CMOS-Nanomagnet Logic

Prevention of integrated circuit counterfeiting through logic locking faces the fundamental challenge of securing an obfuscation key against physical and algorithmic threats. Previous work has focused on strengthening the logic encryption to protect the key against algorithmic attacks but failed to provide adequate physical security. In this work, we propose a logic locking scheme that leverages the non-volatility of the nanomagnet logic (NML) family to achieve both physical and algorithmic security [1]. Polymorphic NML minority gates protect the obfuscation key against algorithmic attacks, while a strain-inducing shield surrounding the nanomagnets provides physical security via a self-destruction mechanism, securing against invasive attacks.  We experimentally demonstrate that shielded magnetic domains are indistinguishable, securing against imaging attacks.   As NML suffers from low speeds, we propose a hybrid CMOS logic scheme with embedded obfuscated NML “islands”.  The NML secures the functionality of sensitive logic while CMOS drives the timing-critical paths.

[1]  N. Hassan et al., in Proc. DAC, Dec 2021.