Quantum annealing correction with over 1,000 logical qubits

The scalability of quantum processors depends critically on techniques to suppress and correct errors arising from decoherence and analog control. The large size and connectivity of the latest generation of quantum annealers gives ample opportunity to dedicate qubit resources to robust and practical quantum error suppression schemes even for complex optimization and sampling problems. We propose an embedding of the quantum annealing correction (QAC) method on the topology of the D-Wave Advantage device that yields up to 1,300 error-corrected qubits, with the vast majority having a degree of 5. QAC outperforms unprotected quantum annealing in time-to-solution while also being effective for sampling low temperature states. We evaluate sampling capabilities with a time-to-epsilon metric relative to the ground state and compare the scaling with parallel tempering.