A polymer-based spacer process for improved parameter targeting in 3D-integrated superconducting circuits

Creating devices with hundreds of superconducting qubits is difficult on single-layer devices due to the large number of intra-die connections and impractical with multi-layer wiring processes due to their use of potentially lossy dielectrics. Instead, indium flip-chip bonding, a type of 3D-integration, can be used to join several single-layer superconducting dies, providing extra signal routing planes while avoiding deposited dielectrics. Although indium bump bonding of superconducting circuits has been successfully demonstrated [1, 2], precisely controlling the vertical chip spacing, which strongly affects circuit parameters such as resonator frequencies and qubit anharmonicities, without degrading the substrate surface remains a challenge [2]. Here we present a polymer hard-stop spacer fabrication process that provides deterministic inter-chip separation and benchmark the frequency reproducibility and internal loss rates of coplanar waveguide resonators. Since the flip-chip bonded die can significantly alter the electrical properties of circuit elements, we also characterize resonators with varying dimensions and discuss the implications of our results for large-scale devices.

[1] Rosenberg et al., IEEE Microw. Mag. 21, 72 (2020)

[2] Gold et al., npj Quantum Inf. 7, 142 (2021)