Toward scalable spin qubits: Si/SiGe quantum dot devices built on a 300mm process line
ORAL
Abstract
Spin qubits in Si/SiGe heterostructures offer a promising platform on which to build a scalable quantum computer. However, fabricating these heterostructures and devices on an all-optical, 300mm process line presents many challenges. One challenge is in creating lateral confinement of the quantum dots. Intel’s SiMOS device architecture is based on fins for lateral confinement, but the formation of fins on Si/SiGe would degrade the strain of the buried silicon quantum well. In this talk, we present a planar device architecture built on a 300mm platform that does not rely on fins for confinement. This planar device is fabricated on a Si/SiGe heterostructure, allowing quantum dots to be formed in a strained silicon quantum well. We will detail progress made on the SiGe virtual substrate and heterostructure, as well as preliminary low temperature measurements.
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Presenters
Brennen Mueller
Components Research, Intel Corporation
Authors
Brennen Mueller
Components Research, Intel Corporation
Stephanie Bojarski
Components Research, Intel Corporation
Hubert C George
Components Research, Intel Corporation
Eric Henry
Components Research, Intel Corporation
Otto Zietz
Components Research, Intel Corporation
Samuel Neyens
Components Research, Intel Corporation
Thomas Watson
Components Research, Intel Corporation
Intel Corporation
Centre of Excellence for Quantum Computation and Communication Technology, University of New South Wales
