Spin Readout of a CMOS Quantum Dot by Gate Reflectometry and Spin-Dependent Tunneling
ORAL
Abstract
We report the measurement of the electron spin orientation in a singly-occupied gate-defined quantum dot, fabricated using CMOS compatible processes at the 300 mm wafer-scale [1]. For readout, we employ spin-dependent tunnelling [2] combined with a low-footprint single-lead quantum dot charge sensor, measured using radiofrequency gate reflectometry [3]. We demonstrate spin readout, obtaining valley splittings in the range 0.5-0.7 meV and a maximum electron spin relaxation time (T1) of 9 ± 3 s at 1 Tesla. These long lifetimes indicate that the silicon nanowire geometry and fabrication processes possess considerable promise for qubit devices, while this spin-readout method is well-suited to scalable architectures. We will discuss progress towards integrating such spin-readout with quantum-limited amplifiers [4].
[1] Nat. Commun. 7, 13575 (2016)
[2] Nature 430, 431 (2004)
[3] Nat. Commun. 6, 6084 (2015)
[4] Phys. Rev. Lett. 124, 67701 (2020)
[1] Nat. Commun. 7, 13575 (2016)
[2] Nature 430, 431 (2004)
[3] Nat. Commun. 6, 6084 (2015)
[4] Phys. Rev. Lett. 124, 67701 (2020)
*We acknowledge the European Union’s Horizon 2020 research and innovation programme (688539), the Engineering and Physical Sciences Research Council (EP/L015242/1), QUES2T (EP/N015118/1) and the Hub in Quantum Computing and Simulation (EP/T001062/1).
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Presenters
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Virginia Ciriano-Tejel
- London Centre for Nanotechnology, University College London, London WC1H 0AH, United Kingdom; Quantum Motion Technologies, Nexus, Discovery Way, Leeds, LS2 3AA, United Kingdom