Silicon MOSFET quantum dots with simplified metal-gate geometry

Silicon (Si) CMOS spin qubits have become a promising platform for a future quantum information processor due to recent demonstrations of high fidelity single and two qubit gates [Veldhorst et. al., Nature 526.7573 (2015)], compatibility with industrial CMOS process and promising prospects for scalability. Typical Si spin qubits devices consist of gate-defined quantum dots, each defined by several metal gates, which pose a challenge to scaling the technology up. Hence, future designs of Si spin qubits will need to reduce the fabrication complexity and adopt a scalable design.

Here, we introduce a two metal-layer MOSFET quantum dot device that reduces the number of metal gates and simplifies the dot tune-up procedure. By performing electron counting measurements with a charge sensor, we determine that the accumulation gate defining the electron reservoir can tune the dot-reservoir tunnel rate by about 10 decades/V. Magnetospectroscopy measurements up to 6 T reveal electron spin filling in the few electron regime from which we estimate a valley splitting of about 290 μeV.