Scalable FPGA-based qubit control hardware
ORAL
Abstract
As quantum computing technology evolves from research laboratories to potential industrial applications, the scalability and synchronization of classical control hardware becomes a limiting factor in the development of intermediate-scale (50-100) qubit systems. We introduce a novel FPGA-based architecture comprised of multiple qubit control boards, interconnected by a fiber-based synchronization system, to implement basic operations such as qubit control and readout. Our hardware represents a cost-effective alternative to commercial test and measurement style AWGs and detectors, and can be readily scaled up for intermediate-scale quantum processors with low latency and synchronization among all channels to a common clock cycle. Having assembled a prototype system with commercial evaluation boards, we present results from bench testing of the hardware and initial tests demonstrating qubit control. Customized hardware with higher channel density is under development.
*This work was supported by the Department of Energy.
–
Presenters
-
Gang Huang
- Lawrence Berkeley National Laboratory