Evidence of Charge Trapping Giving Rise to Resistance Drift of Metastable Amorphous Ge₂Sb₂Te₅

Phase change memory (PCM) is a high speed, high density, scalable non-volatile memory that utilizes the resistivity contrast between amorphous (high resistivity) and crystalline (low resistivity) phases of chalcogenides like Ge₂Sb₂Te₅ (GST) [1]. The large resistivity window enables programming to intermediate states and hence multi bit storage; however, PCM suffers from spontaneous resistance drift after amorphization [2,3] potentially resulting in overlapping resistance levels. It is difficult to be understand resistance drift from room temperature measurements as multiple processes may be occurring simultaneously, presenting a need for cryogenic measurements. We monitor resistance drift in GST line cells for up to ~10⁴ s from 175K to 300K at 25K intervals with varying light exposure. The resistance drift coefficients decrease with decreasing temperature. Light exposure alters cell resistivity at a time scale longer than expected from thermal effects at these temperatures, suggesting a charge-trapping mechanism.

References:
[1] R. S. Khan et al., in Security Opportunities in Nano Devices and Emerging Technologies (CRC Press, 2017), p. 93-114.
[2] N. Noor et al., in Mater. Res. Soc. Spring Meet. (2017).
[3] F. Dirisaglik et al., Nanoscale 7, 16625 (2015).