Gate-tuned Longitudinal Spin Seebeck Effect in Topological Insulators

The recent study of the topological spin Seebeck effect (SSE) in magnetic insulator (MI)/topological insulator (TI) heterostructures has raised an interesting question about the Fermi level tuning in the topological surface states of the TI and its effects on the spin Seebeck voltage (V$_{SSE}$). In this work, we fabricate longitudinal SSE devices with a 50 nm Al$_{2}$O$_{3}$ layer prepared by a two-step atomic layer deposition process. In this structure, the heater atop Al$_{2}$O$_{3}$ serves as a top gate as well. The MI/TI heterostructure samples consist of a 20 nm YIG and a 5 quintuple layer thick (Bi$_{1-x}$Sb$_{x}$)$_{2}$Te$_{3}$ (x = 0.25, 0.27, 0.30 and 0.32) TI thin film. As the top gate voltage is swept, the resistance of the TI sample shows expected changes as the Fermi level position is varied. However, as the heater is turned on to measure the SSE response while the gate voltage is simultaneously swept, we find that the V$_{SSE}$/R ratio does not show a significant variation despite the observed change in resistance. We attribute this effect to the insensitivity of the bottom TI surface to top gate voltage. This result also suggests a short spin diffusion length in TI.