Uniformly spaced arrays of purely semiconducting carbon nanotubes

Patterning uniformly spaced arrays of carbon nanotubes (CNTs) is a key challenge for carbon electronics. Our group adopts a hybrid approach to meeting this goal. We use top-down lithography to pattern trenches on chips. We then use surface-selective chemical monolayers to facilitate the bottom-up assembly of solution-processed CNTs into these trenches. Previously, we showed large-scale integration of CNTs based on this approach [1], but modifications to this process have been needed in order to improve the yield and decrease the fraction of non-switching devices. Our latest results show a high degree of selectivity, alignment and yield of successfully placed CNTs at a 100 nm pitch. Electrical measurements confirm that these chemically placed CNTs are nearly 100{\%} semiconducting and of similar quality to randomly dispersed ones. I will then discuss our strategies for increasing the CNT density and extending these results from chip- to wafer-scale electronics. [1] Park et al., Nature Nanotechnology 7, 787-791 (2012)