Sub-Band engineering through superlattice based barrier heterostructures for higher thermoelectric efficiency

There is a huge desire to increase operation speeds in modern integrated circuits as they get more compact. Heat generation in such a submicron devices is a key factor limiting their performances. As a solution, thermoelectric cooling in heterostructures can address heat dissipation issue in submicron devices. Performance of single barrier heterostructures depends strongly on several parameters including barrier height, barrier width and thermal conductivity of barrier. Superlattice structures have been known to have the lowest thermal conductivities reported for crystalline materials. Low thermal conductivity is beneficial for thermoelectric cooling as it reduces the heat flow from hot end to cold junction. Moreover the band offset between the barrier and base material can be easily tuned by changing the superlattice period. By optimizing the conduction band offset (barrier height), it is possible to control the Joule heating and also optimize the amount of heat absorbed due to Peltier cooling. We investigate the feasibility of using PbSe/PbSnSe superlattice in heterostructures using Monte Carlo simulation. The effect of different parameters such as barrier height, barrier width and superlattice thermal conductivity on thermoelectric cooling of such structures will be presented.