Simulating FinFET Self-Heating for Device Reliability

The continual scaling of transistors has led to sharp gradients in temperature (from ballistic transport of carriers) that result in new difficulties modeling device reliability. Current device-level thermal simulations do not track phonon populations, which are necessary to understand damage from high temperatures in scaled devices. A model for simulating highly localized hot spots due to an optical phonon bottle-neck near the channel/drain interface of a device operating in a ballistic transport regime will be presented. Various expansions of the Boltzmann transport equation (spherical harmonic expansion and methods of moments) are compared to a hydrodynamic model for device thermal simulations. We will discuss the post-processing technique for arriving at phonon populations from technology computer aided design (TCAD) simulations.