Implementation of a five-cavity / four-qubit 3D circuit QED system

Surface code error correction schemes, which have emerged as a guiding paradigm for the development of small prototype quantum processors, have a natural implementation on a skew square 2D lattice of cavities and qubits. We describe the experimental realization of a modular segment containing a unit cell of this lattice in a device consisting of five 3D waveguide cavities and four superconducting transmon qubits. In this system, we demonstrate high-fidelity one- and two-qubit gates with low crosstalk. Moreover, this device provides an extensible framework for tests of protocols needed for error correction in much larger systems.