Drain Current Saturation in Sub-$\mu $m Graphene Field Effect Transistors

Recently, graphene field-effect transistors (FET) with high cut-off frequencies (fT) were reported; however, the devices showed very weak drain current saturation, leading to an undesirably high output conductance. A crucial figure-of-merit for analog/RF transistors is the intrinsic gain (gm/gds). In this work, we show that by employing an embedded gate structure with an equivalent oxide thickness less than 2 nm, strong drain current saturation can be obtained for graphene FETs with short channels. The mechanism was not entirely due to velocity saturation, but rather the combination of a shift of the Dirac point in the voltage domain and a strong bias-dependent gate capacitance. The mechanisms are also verified with models.