Integrated Nanopore Detectors in a Standard Complementary Metal-Oxide-Semiconductor Process
ORAL
Abstract
High-bandwidth and low-noise nanopore sensor and detection electronics are crucial in achieving single-DNA base resolution. A potential way to accomplish this goal is to integrate solid-state nanopores within a CMOS platform, in close proximity to the biasing electrodes and custom-designed amplifier electronics. Here we report the development of solid-state nanopore devices in a commercial CMOS potentiostat chip implemented in On-Semiconductor's 0.5 micron technology. By using post-CMOS micromachining, a free-standing oxide membrane and electrodes are fabricated utilizing the N+ polysilicon/oxide/N+ polysilicon capacitor structure available in the aforementioned process. Nanopores with sub-5 nm diameter are drilled in the membrane using a Transmission Electron Microscope. The integrity of pores is validated by measuring current-voltage and noise characteristics. DNA translocation experiments are also performed utilizing these on-chip pores. In addition, electrical tests performed on the CMOS potentiostat circuitry show that the post-CMOS micromachining process does not have any detrimental effect on the CMOS circuitry.
*This work was supported by Intel Corporation and NSF CAREER Award
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