Development of Graphene for High Frequency Electronics

The practicality and success of a graphene technology depends on the ability to regularly and controllably synthesize graphene; integrate it with metals and dielectrics; and to develop device designs that take advantage of graphene's unique properties. We demonstrate graphene synthesis on SiC(0001) and Sapphire with 1.5{\%} variation in sheet resistance across 100mm wafers. Hall mobility measurements indicate that direct growth of graphene on sapphire leads to a 2x increase in mobility (2200 cm$^{2}$/Vs) compared to silicon sublimation from SiC(0001). Additionally, we have developed high quality ohmic contacts to graphene, which improves the contact resistance by nearly 6000x (5x10$^{-8}$ Ohm-cm$^{2})$ compared to untreated metal/graphene interfaces. Finally, we discuss integration of ultra-thin high-k dielectrics and their impact on graphene transport. Atomic layer deposited oxide heterostructures (seed not equal to overlayer) have deleterious effects on Hall mobility while homostructures lead to an increase in Hall mobility. Importantly, 5nm thick EBPVD HfO$_{2}$ gate dielectrics are successfully demonstrated and show improved Hall mobility, on-off ratio, and transconductance relative to Al$_{2}$O$_{3}$ gates and heterostructure gates.