High yield semiconducting local-gated carbon nanotube field effect transistors
POSTER
Abstract
Carbon nanotube field effect transistors (CNT-FETs) have displayed exceptional electrical properties that are superior to the traditional silicon MOSFET. Directed assembly of individually addressable CNT-FETs at selected positions of the circuit with high throughput needs to be demonstrated for future integrated circuits. Here, we utilize a commercially available semiconducting enriched SWNT solution in combination with ac-dielectrophoresis for the fabrication of CMOS compatible {\&} local gated CNT-FETs with low power consumption and high-speed operation. We assemble the SWNTs between 1 um spaced Pd source and drain electrodes with a 100 nm wide local Al/Al2O3 gate in the middle using DEP. We find that $\sim $80{\%} of the as-assembled device show semiconducting behavior. Measurements on $\sim $30 devices show that the majority of them displayed subthreshold slopes less than 300 mV/dec and as low as 120 mV/dec. The threshold voltage for the local gated devices is 0.5 V on average. Directed assembly of local gated CNT-FETs at selected position of the circuit via DEP may pave the way for large scale fabrication of CMOS compatible nanoelectronic devices.
*This work is partially supported by NSF-CARRER award ECS-0748091.