Fabrication and Characterization of a CMOS-Based Quantum Dot Device

Silicon-based single electron devices are particularly attractive for implementing quantum information processing due to the extremely long electron spin lifetimes. We report here the demonstration of a stack-gated CMOS structure that can define a quantum dot in the few-electron regime and can be integrated with a sensitive, high bandwidth field effect transistor. Multiple lower layer side gates, as small as 50nm, on an ion-implanted Si/SiO2 wafer electrostatically define the quantum dot. A top gate that controls the electron population in the quantum dot is then fabricated on top of an isolating Al2O3 layer made by atomic layer deposition (ALD). The low-temperature ALD process provides excellent device stability while preserving the integrity of the side gates. We found that the devices can be operated effectively both in the accumulation mode and in the depletion mode. Transport through the quantum dots in the few-electron regime for currents less than 100fA can be reliably studied with a good reproducibility. We will detail our fabrication and characterization processes in this presentation.