Surround Gate Germanium Nanowire Field Effect Transistors

Surround gate (SG) GeNW field effect transistors (FETs) were successfully constructed using a novel self-aligned fabrication approach based on the core-shell GeNWs formed with a single-crystalline Ge core and concentric shells of nitride and silicon passivation layer by chemical vapor deposition (CVD), an Al$_{2}$O$_{3}$ gate dielectric layer by atomic layer deposition (ALD) and an Al metal SG shell by isotropic magnetron sputter deposition. Individual SG GeNW FETs show improved switching over GeNW FETs with planar gate stacks owing to improved electrostatics. FET devices comprised of multiple quasi-aligned SG GeNWs in parallel afford on-currents exceeding 0.1mA at low source-drain bias voltages. Capacitance-voltage characteristics of individual GeNW FETs with topgate or SG were directly measured for the first time using a novel method to reduce background capacitance to less than 50aF via device design, ground plane shielding, interprobe shielding, and use of a capacitance bridge circuit. In addition, the mobility of the GeNW FETs was extracted according to the direct electrical and capacitance measurements.