Oxygen transport and interfacial layer engineering in high-k metal oxide gate stacks

Much recent work has been devoted to integrating metal oxide dielectrics into silicon based CMOS. High-$\kappa $ metal oxide stacks processing may lead to diffusion and reactions with negative impact on the electrical properties. We report here results from Medium Energy Ion Scattering (MEIS) on (i) the mechanism of oxygen transport and interfacial layer behavior in multilayer high-$\kappa $ gate stacks and (ii) the influence of crystallinity and grain boundaries on thin Hf oxide and silicate films using isotope tracing. Changes in oxide and silicate interface composition and thickness, phase mixing and crystallization within the film, and film decomposition will be discussed in terms of bulk and grain boundary diffusion. A functional device must include not just a dielectric, but a conducting gate as well. Our results show that the interfacial SiO$_{2}$ layer thickness is reduced by using a Ti overlayer with high solubility for oxygen. We also find that Si atoms initially present in the interfacial SiO$_{2}$ layer incorporate in the high-$\kappa $ layer. Oxygen is also being removed from the Hf oxide, leaving an oxygen depleted HfO$_{x}$ layer. The presence of grain boundaries in crystalline HfO$_{2}$ films suggests an additional path for Si diffusion through the high-$\kappa $ film in the presence of Ti gate.