Instabilities in electrical properties of carbon nanotube FETs with superconducting Pd/Nb electrodes

We investigate low-temperature transport properties of carbon nanotube FETs with the source and drain electrodes made of a Pd/Nb bilayers. The samples are fabricated on overdoped Si wafers covered by thermally grown 500 nm-thick silicon dioxide using photolithographic techniques. The substrates serve as back gates of the FETs. Below the superconducting transition of the electrodes and at large negative gate voltages, about -50 V, the differential conductance is highest, and Andreev-reflection-like features can be observed as a peak at zero bias in differential conductance vs. bias voltage curves. Both metallic and semiconducting nanotubes show such features. At a fixed gate voltage, the differential conductance vs. bias voltage was found to be unstable, with features evolving in time from high transparency Andreev-reflection-like to low-transparency tunneling-like. The instabilities are probably caused by mobile charges within and on the surface of the gate oxide. This work is supported by the NSF (DMR-0239721) and by the Research Corporation.