High Speed Spin-Transfer Switching Behavior of Low Critical Current Spin Valve Nanopillars

For spin transfer writing to be effective for MRAM, the integration of a magnetic device with a scaled CMOS transistor in a memory cell requires that $I_{c}$ for switching a thin, thermally stable element on ns time scales be $<<$ 1 mA. Since $I_{c}$ scales with the volume of the magnetic element and the square of its saturation magnetization $M_{S}$, the use of very small free layers with low $M_{S}$ can result in low $I_{c}$'s. The challenge is obtaining a large enough magnetic anisotropy to ensure thermal stability at $\sim $100 C. We have fabricated 40x120 nm elliptical Py/Cu/Py nanopillar spin valves exhibiting free layer coercive fields in accord with 3-D micromagnetic modeling. For a 4.5 nm thick free layer device, currents necessary for 100{\%} switching go from 0.6 mA for a 10 ns pulse, where thermal activation aids switching, to 2 mA for a 1 ns pulse, where there is insufficient time for thermal fluctuations and $I_{c}$ is set by the current required to transfer enough spin into the free layer to force its reversal. We will discuss the switching mechanisms of these devices in the ns regime, and our progress towards achieving fully stable devices with low $I_{c}$'s.