Development of a High-Bandwidth Waveform Processing System using RFSoC for RI Beam Experiments

We have been developing a digital waveform processing system with the Xilinx Zynq UltraScale+ RFSoC named CALDERA for high-resolution timing and charge measurement of plastic scintillators. It is the optimized system for experiments at RIKEN RI Beam Factory (RIBF) in Japan, to perform particle identification of RI beams.

The Xilinx RFSoC includes 4GHz FADC, FPGA, and CPU, and it is expected that a system that allows pipeline processing of high frequency signals without dead time can be established. For this development, the ZCU111 Evaluation kit has been adopted.

We have succeeded to develop the algorithm timing and charge information simultaneously by adopting centroid calculation for the waveform processing method. Especially, a very good timing resolution of 9 ps in sigma was achieved. At present, we are trying to implement this method as an FPGA IP core.

In this contribution, the overview of the system, the algorithm for the extraction of timing and charge information from a waveform, and the implementation of FPGA firmware will be reported.