Seeking Methods to Reduce the Aspect Ratio Dependence in Deep Silicon Etch
POSTER
Abstract
We are examining how to reduce the Aspect Ratio Dependence (ARD) of deep silicon etch processes while maintaining both smooth sidewalls and an acceptable etch rate. In particular, SF6/O2/Ar and SF6/C4F8/Ar plasmas have both been shown to etch silicon with good anisotropy in a continuous etch process producing good sidewall profiles and at acceptable etch rates. Unfortunately, these processes also suffer from significant ARD. We are proposing to use an ARD deposition process to balance the ARD of the etch process and thereby find a reasonably AR independent process having an acceptable overall etch rate. To do this, we propose to examine both the ARD deposition rate into various AR trenches and the ARD etch rate of the passivation layer in those trenches. We are pursuing this in part because other researchers have shown that the etch rate of low AR features can be reduced (by depositing a passivation layer) and allow larger AR features to ``catch up.'' As a result, the same depth trench can be obtained [1]. The work is being carried out in a Plasma-Therm Versaline reactor in the UTD clean room. \\[4pt] [1] See for example: S. Lai, D. Johnson {\&} R. Westerman, J.Vac. Sci. Tech. A, 24, 1283, (2006).
*Special Thanks to K. Kirmse, A. Ali of Texas Instruments Inc. Acknowledgement: This material is based upon work supported in part by the SRC under award number 2012-VJ-2261.