Low-temperature circuit component characterization and nanofabrication process tuning for cryogenic dark matter detectors

ORAL

Abstract

Successful detection of dark matter requires incredibly sensitive detector devices and readout circuits with well-controlled noise mitigation. Thus, detector development efforts at SLAC involve optimizing device fabrication processes to generate robust, precision cryogenic detectors that couple well to low-noise signal amplification circuits. In this talk, I will discuss preliminary results on electrical component behavior at low temperature as it pertains to high electron mobility transistor (HEMT) amplification research conducted by the Search for Light Dark Matter with Narrow-Gap Semiconductor (SPLENDOR) collaboration. I will then summarize recent progress made on superconducting thin-film detector fabrication by the Dark Matter Quantum Information Science (DMQIS) Group at SLAC.

*Work supported by a Geoff and Josie Fox Summer Research Fellowship

Presenters

  • Riley J Carpenter

    • Santa Clara University

Authors

  • Riley J Carpenter

    • Santa Clara University
  • Zoe J Smith

    • Stanford University; SLAC National Accelerator Laboratory; Kavli Institute for Particle Astrophysics & Cosmology
    • Stanford University
  • Jadyn Anczarski

    • Stanford University; SLAC National Accelerator Laboratory; Kavli Institute for Particle Astrophysics & Cosmology
    • Stanford University
  • Ivar Rydstrom

    • Santa Clara University
  • Betty Young

    • Santa Clara University
  • Noah Kurinsky

    • SLAC National Accelerator Laboratory; Kavli Institute for Particle Astrophysics & Cosmology
    • SLAC National Accelerator Laboratory