A surface trap for multi-qubit quantum computing

A silicon-based surface trap which integrates a shunt-capacitor interposer has been fabricated for quantum computation and simulation experiments. The trap is fabricated through the standard MEMS processes and in a bow-tie shape for high optical access, compatible with cross-chip Raman beams for individual addressing. The RF and inner-DC electrodes are modified for smooth potential to shuttle ions loaded from the back of the chip, and RF loss is minimized as well. The parallel-plate capacitors around 600 pF each on interposer are devised to shunt the pick-up RF signal of DC electrodes to ground. The full package is standardized on a 100-pin CPGA architecture for easy replacement. A Yb$^{\mathrm{+}}$ ion chain with a radial trap frequency over 3 MHz has been successfully trapped on our surface trap. After optimization of trapping parameters, we have measured the dark lifetime and heating rate through Doppler-recooling method. In future, we will implement Raman-sideband cooling and individual addressing in this new type of surface trap.