Ion heating rates in scalable trap architectures for quantum computation

We describe the characterization of several microfabricated ion trap architectures for quantum computation. Our apparatus for testing planar ion trap chips\footnote{S. Seidelin \emph{et al.}, Phys. Rev. Lett. \textbf{96}, 253003 (2006).}$^,$\footnote{ J. Kim \emph{et al.}, Quantum Inf. Comput. \textbf{5}, 515 (2005).} features: a standardized chip carrier for ease of interchanging traps, a single-laser Raman sideband-cooling scheme, and photo-ionization loading of Mg$^+$ ions. We measure the heating rate of an ion$^,$s motional degree-of-freedom, a factor which limits multi-ion logic gate fidelities. Two measurement techniques are compared, the standard Raman sideband technique and time-resolved fluorescence detection during Doppler re-cooling$^4$. One of the traps, fabricated from gold on fused silica, shows heating rates below 1 quanta/ms (motional frequency = 5.3 MHz), boding well for planar ion trap designs.