Selective epitaxial growth solutions for Si based alloys; Si:C:P, Si:P, Si:C, i-Si
COFFEE_KLATCH · Invited
Abstract
Strain enhancing techniques for boosting carrier mobility in PMOS transistors has been in production since the 90 nm process node. SiGe alloys are used to induce compressive strain initially in planar MOSFETs and more recently in finFET device channels thereby increasing the hole mobility. For the NMOS transistor the use of tensile strain to enhance electron mobility has only recently been applied starting at the 20 nm node. This is accomplished by alloying silicon with carbon and/or phosphorus both of which have smaller atomic radii than silicon thus generating the desired strain. SiC:P and to a lesser extent Si:P alloys pose new challenges not encountered with SiGe:B PMOS stressors. Among these challenges are the low solubility limits which require low temperature metastable growth techniques such as chemical vapor deposition (CVD) to be employed. This presentation reviews the history and performance enhancements of PMOS stressors and presents recent accomplishments related to NMOS SiC:P and Si:P stressors processed on finFET structures.
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